Abstract

Electromagnetic interference (EMI) has become a serious challenge for signal integrity (SI) in modern high-speed digital systems. With the technology scaling down into nanometric CMOS technologies and lowering supply voltage, EMI induced signal integrity effects are becoming more significant compared to voltage margins. This work presents experimental results of controlled RF interference affecting the eye diagrams of the CMOS inverter. The test circuits were fabricated in 65 nm, 130 nm, and 180 nm CMOS technologies. A dedicated measurement methodology has been developed to inject RF to the supply node and to capture both time domain and eye diagram signals to visualize EMI effects. Unlike previous works that analyzed effects of channel-induced impairments or presented simulation results on EMI effects, we present an experimental evaluation of the impact of EMI on circuit functionality. Experimental results reveal that EMI predominantly modulates the logic-high amplitude, leading to progressive eye closure. The eye height decreases monotonically with increasing RF injection power across all investigated technology nodes, whereas the logic-low level remains comparatively stable. This behavior indicates that the dominant degradation mechanism is consistent across technologies and is primarily governed by the conduction state of the CMOS inverter. To illustrate the degradation caused by EMI, a compact, analytical expression for the reduction of the eye height is derived. The reduction is given as a function of the RF interference amplitude and expressed through a technology-dependent scaling parameter. Good agreement is observed between the analytical model predictions and experimental measurements for varying interference amplitudes and different technology generations, with an average absolute prediction error below 2%. Results are presented to demonstrate eye height as a sensitive and reliable metric of EMI susceptibility. Additionally, a practical framework for rapid estimation of signal degradation is presented for high-speed digital systems operating in complex electromagnetic environments.

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