Abstract

Edge artificial-intelligence (AI) inference energy comparisons can mislead when timing, system-energy integration, and requested hardware states are conflated. We audited 558 Jetson Orin Nano runs; the balanced primary design comprised 378 runs on three distinct physical boards, spanning two convolutional neural networks (CNNs), FP16/FP32/FP64 tensor dtypes, seven batch sizes, and three requested profile branches. Forward performance was separated from onboard input-rail (VDD_IN) energy over the logged window. In the full grid, precision accounted for 71.5% of log-scale forward-throughput variation and 66.4% of logged-window energy variation, largely reflecting FP64 stress. In the FP16/FP32 slow + medium sensitivity, batch instead accounted for 54.1% of forward-throughput variation. Across these cross-board-stable branches, FP32 retained 68.4% and 54.8% of FP16 throughput for MobileNetV2 and ResNet-50, while using 1.212 and 1.612 times the logged energy. At batch one, FP16 retained only 85.4% and 84.7% of FP32 throughput. All 126 requested-fast runs exhibited an exact observed association: the realized low/high clock regime matched whether the last non-fast predecessor was slow (57/57) or medium (69/69). Thus, requested profile labels did not define independently realized treatments. Reliable claims require compatible measurement boundaries, explicit protocol overheads, and verified state reset/read-back.

IPC Classification

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